In a fast power converter with distributed output capacitors with parasitic impedances between them, the settling time of the output voltage is too long, making voltage unsuitable as a control input. In an illustrative embodiment, the persistent reply cache is embodied as a file comprising a combination of contents of one or more enhanced non-volatile log records of non-volatile electronic storage, \u201cdirty\u201d in-core buffer cache data structures, and on-disk data structures corresponding to those dirty buffer cache data structures. A concave base supports the spherical housing. The shift value is then used to resample the current image to make the desired shift prior to input to the compression encoder, thereby minimizing redundant edge information.