To provide an integrated IP network containing therein a plurality of separated IP networks with a variety of characteristics, such as IP telephone network, IP video network, IP electronic text network, best effort network, IP data multicast network and IP-based TV broadcast network. Also, a memory system, comprising: a memory controller; and at least one composite semiconductor memory device configured for being written to and read from by the memory controller and comprising a built-in error correction coding engine. In order for a transformer 20 whose primary side is an AC power supply and whose secondary side is the expected voltage of the electrical device for driving the engine system to be housed in the package, an intake port, an exhaust port, and a ventilation fan for cooling the transformer are provided in a ventilation path that is independent from other devices. The first threaded surface contains threads that are a different pitch than the second threaded surface. Multiple analog signal outputs are generated corresponding to multiple scalar values, each signal output being driven to a level according to its corresponding scalar value. The lock bar intercepts the rearward arc path of a blockable part.