A semiconductor memory device includes a substrate, a well region in the substrate, a patterned first dielectric layer on the substrate extending over the well region, a patterned first gate structure on the patterned first dielectric layer, a patterned second dielectric layer on the patterned first gate structure, and a patterned second gate structure on the patterned second dielectric layer. A host computer is provided with a spool file manager for calculating the relative position of the logic page to the physical page, and a despooler for processing the layout data, obtained by enlarging or reducing the logic page, to a data format matching the graphic engine. The system then buffers data destined for the application at the transport layer on the client, and sends the buffered data to the application when the condition specified by the configuration parameter is met. Adhesive articles including the pressure-sensitive adhesive are disclosed. Embodiments of the invention associate annotations with both a data source \u201cfamily identifier\u201d as well as a \u201cversion identifier.