1460495185-f799abe7-2777-496b-b740-b02e2beb35ca

A multi-phase partial response equalizer circuit includes sampler circuits that sample an input signal to generate sampled signals in response to sampling clock signals having different phases. The device comprises a detector circuit for detecting those conditions which can cause the output device to go into saturation. The control is formed to control a change-over switch to connect the control input of the charging switch either to the positive output rail or the negative output rail via a potential coupling means.