A memory device comprising a layer of piezoelectric material and a layer of ferroelectric material clamped together such that a voltage applied to one layer results in a voltage being generated across the other layer. The one of the plurality of chambers has a projection, another one of the plurality of chambers has a recess, and the one chamber and the other chamber are connected to each other as the projection is fitted in the recess. The container body has an upper wall provided with an opening, and a side wall. The both widthwise ends of these components are formed as edge portions.