A memory chip suitable for use in a daisy chain of memory chips. A first hard mask is deposited over a semiconductor wafer, and a second hard mask is deposited over the first hard mask. The nitride films apply stress to the channels of the MONOS-type memory cell, the n-channel transistor, and the p-channel transistor. The bottom surface of the top die is separated from the top surface of the bottom die by an interposer, which creates a space between the exterior regions of the top surface of the bottom die and the bottom surface of the top die. The varistors have been selected by taking into consideration a relationship between the characteristics and the ability of the first overvoltage protection elements contained in the semiconductor integrated circuit chip, and exhibit the effect for preventing the electrostatic damage.