A synchronous flash memory includes an array of non-volatile memory cells. The system and method of the present disclosure enables a user, e. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them. The support frames each have a cross member supporting a connection lever defining a path.