A method for characterizing a CMOS logic cell of the partially depleted silicon-on-insulator type may include modeling the logic cell and determining internal potentials of transistors of the cell in a dynamic equilibrium state based upon a functional simulation of the modeled cell. Synthesis of the cationic lipid can include a ylide-based reaction, such as a Wittig reaction or sulfur ylide reaction. The refrigeration system may be located at a retail location and the management center may be located remotely to the retail location. The inerting system may provide for redundancy in the TCPU section. Also provided is a method for retrofitting an existing amusement slide that has a tunnel without such a lighting effect or that has a tunnel with inadequate or undesirable lighting effect. A memory transistor comprises first and second sourcedrain regions formed on a semiconductor substrate, a charge storage film having a charge storage faculty and a gate electrode.