A chip packaging apparatus includes a substrate, a load frame attached to the substrate by an adhesive material, the load frame being formed to define an aperture and a semiconductor chip mounted on the substrate within the aperture. The memory cells each include a floating gate transistor having an active area, source and drain regions, a floating gate, and a control gate, and each of the floating gate transistors is serially coupled to one of the selection transistors. LeadOp algorithm provides users to optimize a lead compound with various combinations of fragments with stronger binding based on group efficiency, generating lead with stronger potency. The secondary element can include a base, an engagement member and an actuator. The value accessed is then compared to an actual value received from the channel.