Methods are disclosed for forming dual damascene back-end-of-line interconnect structures using materials for the vias or studs which are different from those used for the line conductors, or using materials for the via liner which are different from those used for the trench liner, or having a via liner thickness different from that of the trench liner. In one embodiment, an apparatus includes a planarization member engageable with at least some of the plurality of outer surfaces to apply a planarization action on one or more of the outer surfaces to substantially planarize the plurality of outer surfaces, and a securing element to securely position the bumped device during engagement with the planarization member. The system also employs operator identification and vehicle location systems with a data logger allowing the microcontroller to store data on test results, operator identification and vehicle location. Each VPU performs sampling on the same pixels or pixel centers, but each VPU creates sample positioned differently from the other VPUs corresponding samples. By adjusting the second value to the third value in the second color space intuitively, the present invention achieves the advantages of providing an intuitive operation, simplifying the adjustment, saving time and enhancing the user experiences. The delay time of each sensor unit is determined such that an operating period is matched with a predetermined period determined in each piece of the type information.