Memory device is described that utilizes a reduced number of sense amplifiers to sense the data bits of a selected column page. Each node comprises a plurality of processors with associated caches and memories interconnected by a local switch. The cam system moves relative to the rod and includes a compression spring and a cam. In consequence, the CMOS inverter can operate at high speeds at low power supply voltages without being affected by the threshold voltages. The lower reservoir surface extends inwardly into the corner pad defining a reservoir between the vertical member and the weather strip.