A system and method for powering an implantable cardiac therapy device uses a hybrid battery system. The clock recovery circuit includes a phase-locked loop implemented in digital domain and an analog filter to eliminate any undesirable frequencies from the output signal of the PLL. When a message receiving side application requires, the messages are transferred. The bobbin portion 24 is divided into a plurality of portions along the circumferential direction of the core 32. The adder adds the adjustment amount obtained by the totalizer to the original luminance value of the central pixel, and outputs the sum as a new luminance value of the central pixel for each matrix. In this manner, a ground path is enabled between the signal terminal and ground terminal arrays.