1459840223-66b1d756-b67f-445d-9849-a135038f328b

In a semiconductor device in which a plurality of memory LSIs and a plurality of processor LSIs are stacked, as the number of stacked layers increase, the communication distance of data between a memory LSI and a processor LSI will increase. The damping member isolates the equipment within the housing from the rack such that earthquake vibration resistance is improved. In addition, the output speed of a flag signal is faster than that of an existing method in which read and write addresses are compared, so that the remaining amount of data in the FIFO is precisely measured.