A hexagonal conductor path layout for power and ground distribution planes in a multi-layer VLSI device. The semiconductor device is composed of a semiconductor substrate provided with a trench for isolation, and an insulating film formed to cover the trench for relaxing an internal stress of the semiconductor substrate. A spring resiliently urges the shield from a retracted position to an extended position. Each EC channel includes first and second sense coils with opposite polarities. The deformations of the mask and of the membrane holder perpendicular to the mask plane are compensated for by lateral displacements of the mask structures of the corrected mask pattern.