Disclosed is an image signal processor for use in an image processing system. The DRAM caches do not require regular refresh of its data and hence the refresh blank-out period and refresh power are eliminated, thus improving cache availability and reducing power compared to conventional DRAM caches. Another aspect of the invention uses the calibrated images to quantitatively preset absolute windowlevels for filming and image display, which provides standardized viewing for diagnostic purposes. The breaking teeth on the two rotors move odd-shaped material or the like toward the crushing space by similar action. The lip holders of the corner bracket assemblies receive the connecting lips of the panels.