A capacitor having low voltage dependency and high pn junction diode reverse breakdown voltage. In one embodiment, a method comprises receiving client data at the first rate, buffering the client data, retrieving the client data, combining the client data with dummy data according to the pattern, and transmitting the combined data at the second rate. A container for holding ions and at least one multipole unit are provided. 5 and is determined on the basis of the terminal voltage of each time period of a plurality of predetermined time periods. Each hole is adapted to receive an element with a light emitting end and a power receiving end. A selected threshold voltage for the memory cell corresponding to a selected one of the programming states is generated by applying a selected constant drain-to-source bias voltage and a selected gate voltage.