The present invention provides a design tool and method which creates a VHSIC Hardware Description Language board model that can be used by digital engineers to verify their ASIC and FPGA designs. The movable element includes a first movable plate, a second movable plate, and a third movable plate. The lower portion has a backing of a dry release laminate patch. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. According to another aspect the present invention is a transceiver comprising a mixer according to the first aspect.