A semiconductor storage device includes a memory cell array having a plurality of SRAM cells arranged along a pair of bit lines that extend along a first direction. The method involves recording a digital video bit stream in the digital recording mode and switching to the analog recording mode for recording the corresponding analog video signal in response to a fault condition. Upper and lower collared studs are connected by a threaded connection that allows the length of the tower stud assembly to be adjusted. The result is that the margin of error of the PLL is improved by a half clock period, since on the average the choice between each one of the two samples represents half of the total one-clock resolution limit of the system. The air is rotated within the coarse dust chamber to force coarse dust to travel away from the chamber’s center and air containing only fine dust travels through the filtering tube. The dial plate is pivotally disposed on a surface of the base and linked with the driving member.