A memory device wherein a diode is serially connected to a programmable resistor and is in electrical communication with a buried digit line. The first inverter can include a first pull-up device, a first pull-down device and a second pull-down device. Furthermore, the method includes etching and removing a part of the diffusion layer by using sodium silicate, and forming a first electrode that makes an electric contact with the diffusion layer and forming a second electrode that makes an electric contact with the substrate. When performing the row or column transform, at least one transformation operation on at least one zero value may be bypassed or performed in a reduced-power manner, where such transformation operation would otherwise be performed in a manner consuming full power if the zero value were a non-zero value.