A test signal applied to an embedded memory is changed in synchronization with a test clock signal, set to an invalidated state by an asynchronous control signal asynchronous to the test clock signal and then is applied to a memory. The apparatus further includes a register to store the reference macro block. A system BIOS identifies one of the first and second video adapters 203, 207 as a primary video adapter and the other of the first and second video adapters 203, 207 as a secondary video adapter.