1459953000-03d916b8-e7be-4261-ac28-70e6aaeec51c

A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically active portion of a transistor gate is disclosed. In a read mode, a plurality of read data applied from a cell array block are stored in a readwrite data register array unit through a common data bus unit. One embodiment provides for a diaphragm having a boss manufactured using a two step process that results in a boss thickness that is independent of the thickness of the starting material.