An SRAM includes a plurality of memory cells which are arranged in an extension direction of bit lines, each of which has a long edge and a short edge, an extension direction of the short edge being equal to the extension direction of the bit lines. A target tightness value is determined during the learning mode. A raised rib portion extends around a periphery of the opening of the face plate. Accordingly, resources on the one or more Ethernet links may be reserved via AVB to give priority to one of multimedia, control, diagnostic, and sensory information.