1459974364-d124601f-61b3-4b90-9e1a-6da98be73ce4

This invention teaches a way of implementing formally verified massively parallel programs, which run efficiently in distributed and shared-memory multi-core chips. In a method aspect of the invention, a substrate formed from a sacrificial semiconductor wafer is provided having a plurality of metallized device areas patterned thereon. The photographic lens of the invention and an image sensor, together, fit within a volume of about 10 cm3. The bus interconnect is further configured to map health information for each of the plurality of master devices into virtual priority space.