A voltage generation circuit of the invention applied for a non-volatile semiconductor memory device has a memory cell array including multiple non-volatile memory elements. A main signal path includes a Mueller-Muller based timing error detector. Contacts in the connector receptacle may be protected from damage due to improper insertion of a second electronic device or connection to a second electronic device. This allows the sharing of the magnetic circuit and an electromagnetic actuator. The inventive Group III nitride semiconductor light-emitting device comprises a substrate; and a Group III nitride semiconductor layer including a light-emitting layer, stacked on the substrate, wherein the side face of the Group III nitride semiconductor layer is tilted with respect to the normal line of the major surface of the substrate. Also described are a method and apparatus including receiving a beacon message, inspecting clock descriptors in the beacon message, selecting a best master clock responsive to the inspection and transmitting a message to schedule a quiet period based on the selected best master clock.