1459982616-12199322-3d94-4ebb-9984-57978cbe3b42

In a semiconductor device fabrication method, a first low dielectric constant film having a specific dielectric constant of k less than 3 is formed over a wafer so that an edge position of the first low dielectric constant film aligns with a first position along the circumference of the wafer. The device comprises a delay lock loop to provide an output signal based upon a phase difference between a reference signal and a feedback signal, said delay lock loop comprising at least one delay circuit comprising a plurality of logic gates configured to provide for substantially uniform degradation of a plurality of NAND gates in a static state. The logic section receives i-th data of the N parallel data to output the i-th data or inverted i-th data in response to an active status or an inactive status of an j-th clock signal of the N clock signals. For that purpose, an eccentric being mounted on the actuation element acts with its running surface onto a cam in such a way that it retains the eccentric due to the frictional force acting between the cam and the running surface. The doped regions are disposed at both sides of the gate in the substrate between the isolation structures respectively.