1460427050-428459d3-f3cd-4c33-9014-5d279c396914

A delay circuit includes a phase vernier having a plurality of logic components. Two ridges form a pair in which the bottom ridge is at least partially nested in the top ridge to the extent that the ridges are bonded to each other in a trailing edge area of the component along a width extending in the depth or y-direction of the component. The waste water is diverted, through a control gate, into the penstock where it flows through and operates one or more water-operated turbines.