A plurality of semiconductor chip mounting areas are arranged in series on the top surface of the lower edge section of the lower glass substrate of a liquid crystal display panel. The bit stream processor includes a bit stream exclusive register in a general purpose register in order to process data of a variable length effectively. A source node may broadcast a DMA descriptor over a first network to a target node, to initialize the collective operation. Each of the piezoelectric oscillators includes a plurality of laminated piezoelectric layers. After updating the data, the nodes can release the cross-domain lock. The lock maintains the piston in the latched position, the lock being adapted to unlock in use upon receipt by the valve seat of a disconnect valve member and a predetermined hydraulic pressure.