The present invention provides a memory chip which can be operated in a normal mode and in a test mode and which has a device for outputting data from the memory chip and a device for enabling the device for outputting data when the test mode has been activated. A semiconductor integrated circuit section 11 and an optical wiring section 21 are electrically connected to each other by a connection section 31 provided between a face of the semiconductor integrated circuit section 11 and a face of the optical wiring section 21 facing each other. An electrical circuit is mounted stationary relative to the container, the electrical circuit being electromagnetically coupled to provide a motive force to the at least one piston. The undersurface of the under fill medium is flush with the undersurfaces of the interconnections.