A semiconductor memory device capable of saving power supply voltage and power consumption without increasing the forming area of memory cell array by using MTCMOS technology. The clock driver is configured to provide a system clock signal based on a root clock signal when the memory circuit is in a read mode, and is configured to stop providing the system clock signal when the memory circuit is not in the read mode. The determination is made based on whether processing of data of a second job by the first or second processing unit requires longer time.