A memory cell for storing a bit having one of two logic states. A computer processing system has computer-executable operating system instructions including first instructions that interact with a first serial device according to a predefined inputoutput hardware interface. A developing portion enables generation of musical tone signals for at least one of the parts and disables generation of musical tone signals for the other parts in response to user’s direction in a state where respective settings of various voices to be applied to musical tone signals for the parts have been done.