New methods and configurations are provided that allow for a large memory capacity, as well as minimized interconnect distances between the memory chips and one or more processors, and the HUB chip-set. Each pumping element has a corresponding intake valve communicating with an intake conduit supplied by a low-pressure pump. The floating gate comprising a coupling part and a gate part is disposed over the control gate and located over a portion of the substrate with the gate oxide layer there-between. The barrier layer of the container wall is therefore continuous from the container to inside the fitting.