A self-locking linear adjustment mechanism may be configured in the form of a rod assembly or a cartridge assembly. The device comprises a switch element, which may include a detector, an emitter array, and a switch controller. In the serial bus controller according to an embodiment of the present invention, access latency time by addresses is programmed using a nonvolatile ferroelectric register, and address access time is differently controlled depending on the programmed access latency when data are exchanged between a master and a FRAM chip through a serial bus, thereby improving system performance.