A pulse amplitude modulation signal generator that injects a copy of a pulse into the PAM baseband signal prior to frequency upconversion and power amplification. A wiring trench formed in the insulating film reaches partway in a thickness direction of the insulating film. The DRAM memory buffer controller is coupled through a memory bus to a plurality of a dynamic random access memory modules and a flash memory module, which are at the same hierarchical level from the processor. The cover is movable between a closed position, in which said recess is covered, and an open position, in which said recess is accessible. A gate dielectric is formed radially about the pillar.