A method and apparatus for testing a scan-based 3D integrated circuit using time-division demultiplexingmultiplexing allowing for high-data-rate scan patterns applied at inputoutput pads converting into low-data-rate scan patterns applied to each embeddded module in the 3DIC. A pupil mirror having a reflective pupil mirror surface is positioned at or close to one of the first, second and third pupil surface. The leading-zero anticipator generates a leading zeros string and a leading ones string by examining carry propagates, generates, and kills of two adjacent bits of two input operands of the adder.