There is set forth herein in one embodiment a FinFET semiconductor device having a fin extending from a bulk silicon substrate, wherein there is formed wrapped around a portion of the fin a gate, and wherein proximate a channel area of the fin aligned to the gate there is formed a local buried oxide region aligned to the gate. The guide track system comprises a first guide track piece, a second guide track piece, and a bracket assembly configured to support the first and second guide track pieces. In this way, operating specifications of a semiconductor device at worst case temperatures may be met without compromising performance at other operating temperatures.