A semiconductor chip or wafer comprises a passivation layer and a circuit line. The method includes forming a metal line connected to an underlying element by, for example, performing a main etching process and an over-etching process, at the same time, forming a metal fuse of which one side is connected to the metal line and the other side is connected to a semiconductor substrate. Also includes is a piezoelectric ceramic sensor having a plurality of piezoelectric ceramic elements arrayed and spaced to receive the activation signal detect one or more features of a digit proximate to the array in accordance with the received activation signal and produce output signals representative thereof. A normalizing processor is also included for normalizing the adaptively processed subbands. The inspecting order may be determined so as to complete the inspection in a shortest possible time. Between the upper and lower elongate members, there extend mutually spaced pillar portions of integrally molded plastic.