A graphics processing system including a cache memory circuit coupled to the graphics processor and the address and data busses for storing graphics data according to a respective address. This can provide a manufacturing technology for CNTs capable of mass-producing aligned CNTs at lower cost. Pursuant to a communication request by the kernel to the HMC, a socket of the HMC is opened along a communication path between the KM and the kernel according to an event flow type selected by the KM for the event flow. When a processing unit and a high frequency side dual interface memory unit are driven, the processing unit fetches the product information signal from the ultra-high frequency side dual interface memory unit. Furthermore, the plastic spud insert and the inner surface of the metal ring may have complementary circumferential profiles to discourage relative rotation between the metal ring and the spud insert.