1460429085-bb01ff24-0332-4116-a29b-3ad7d3772b83

The present invention is directed to an integrated circuit device having a memory cell for storing a data and refresh circuitry for refreshing that data in the memory cell. A protease substrate for use in the method of the invention is also disclosed. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Furthermore, M iso-loudness contours can be linearly transposed to determine T iso-loudness contours. When the transistor opens, current is forced through the resistor coupled in parallel with the transistor, thereby limiting the current to a maximum value.