A system is provided that includes a power supply connectable to a semiconductor wafer including opposing, major front and back surfaces joined by a circumferential side, with the wafer undergoing processing including electroplating a damascene layer on the wafer. User addresses are assigned to specific delivery sites based on an analysis of network performance with respect to each of the available delivery sites. A ratio between and is determined, where P1 is a first pressure at a feed side of the first membrane, P2 is a second pressure between the first and second membranes, and P3 is a third pressure at a permeate side of the second membrane. An application program can then use the interfaces and adapter objects to access the directory in an object-oriented manner. The cover 30 has a covering wall portion 31 which is fittable to and detachable from an outside of the body 10.