A second forcing shutoff operation is performed for a power MOSFET 15 and the like, if a time when a load current passing on a power supply line L exceeds a first threshold current Ia reaches a first reference time. At least one IC die having a top semiconductor surface and a bottom surface and at least one through substrate via including a tip protruding beyond the bottom surface to a tip length is provided. A dominant one of the address alignments is identified.