A method for identifying and modifying, in a VLSI chip design, wire routes within a region of wiring congestion that can be routed around that region without inducing timing violations by the insertion and proper placement of inverters. Sensing circuitry is coupled to the printed circuit board and may be configured to receive electrical signals from the sensing element. Also disclosed herein is the site-specific derivatization of proteins, polypeptides and peptides having PCL or pyrrolysine incorporated therein.