A column address decoding circuit of a semiconductor memory apparatus includes a predecoder configured to combine a column address and a decoding test signal, thereby outputting a decoding address. to produce cracked gas, that gaps between graphite layers are expanded by its gas pressure to obtain expanded graphite particles having an expansion rate of 200 to 300 times, and that these expanded graphite particles are subjected to pressure molding. In transmit standby mode at least some of the synchronization signaling such as pilot tone signaling is reduced in power level andor rate with respect to the active mode. The procedure dynamically downloads the requisite code segments for each phase of the function from a cheaper, slower external memory into the DSP on-chip RAM during inactivity intervals, thereby reducing the DSP on-chip RAM requirements. More specifically, the first application marker uses TIFF tags within an Exif application marker and the second application marker uses a FlashPix compatible structured storage stream, while the entropy coded data includes restart markers to define tile boundaries within the entropy coded image data. The correcting unit corrects the intensity of the development field for developing the electrostatic latent image on the image carrying surface based on the acquired correspondence relation and the space detected by the space detecting unit, for example.