Circuits and methods for generating multi-phase clock signals using digitally-controlled hierarchical delay units are provided. In a switching regulator of hysteresis current mode control system, a sense resistor connected in series to a coil is eliminated, a serially connected resistor and a capacitor are connected in parallel to a coil in place of such sense resistor. A portion of the main pole resides at the ABS. The glass composition of the present invention includes a substantially reduced content of boron and preferably an increased amount of sodium dioxide. Said films comprise a conductive phase based on pyrochlore-related compounds, and a dielectric phase based on glass.