1459902882-fb14de3e-728e-40e8-b80d-a3fd6677e683

A semiconductor memory device having a dummy active region is provided, which includes a plurality of parallel main active regions and a dummy active region coupled to ends of the main active regions. The surface layer, orthogonally to the surface into the sample interior, displaying a virtually linear course of the accompanying hardening and being achieved by a complete phase change in the structural state from ferrite via austenite to martensite. An electronically-controlled variable bleed solenoid controls the output pressure level of both of the regulator valves. 5 p, and to sense an electrical characteristic of the pressure transducer during the current-driving time period.