Methods of forming a stitched multi-layer fabric are provided. A gate structure is present on a channel portion of the second lattice dimension III-V semiconductor layer, wherein the channel portion of second lattice dimension III-V semiconductor layer has the compressive strain. The method further includes determining, by the device to be discovered, whether the IP packet is intended for the device to be discovered. During the covering step, the pipe and the funnel-shaped part are moved with respect to each other to describe a non-closed loop trajectory, such that a high-voltage connection element is not completely coated.