An integrated circuit device having vias having good resistance to migration causing the breaking of a wiring line, or an integrated circuit device having a wiring structure that is fined by breaking the limit of lithography technique is provided. The shapes of the upper contact part and the lower contact part are formed such that, when one tray is placed on the upper side of the tray, the one tray can be moved in the direction that the gravity center of the one tray is disposed just above the gravity center of the tray. The clamp circuit limits the magnitude of the timing voltage signal to a clamp magnitude between the initial magnitude and the second magnitude, thereby preventing the timing voltage signal from exceeding the second magnitude.