A first heat radiation unit is formed on one surface of the imaging unit in a vertical direction. According to the present invention, the number of photolithography processes can be reduced by replacing or combining an additional mask for forming an extended drain region of a high voltage depletion-enhancement CMOS with a mask for forming a typical well of a logic device, so productivity of the total process of the device can be enhanced. 0 m in width, the light emitting layer and the upper layer having an interface distant from a bottom of the stripe by 0 m to 0.