Memory cells are constructed from double-gated four terminal transistors having independent gate control. Locations of common pilot sequences are predetermined, and includes 1) in each subframe, a pilot sequence is disposed in a first symbol position for each of at least two staggered sub-carriers, and 2) in at least one subframe, at least one pilot sequence is disposed in other than the first symbol position and in a sub-carrier other than any of the at least two staggered sub-carriers. Calculated die characteristics are compared to defined package parameters andor to calculated package parameters to make a determination of whether a die with the calculated characteristics fits into a package as defined by its parameters. The container is mounted to the structure using a T-channel bracket with shims.