A semiconductor device includes an insulating substrate, a metal pattern formed on the insulating substrate, a power terminal bonded onto the metal pattern, and a plurality of power chips bonded onto the metal pattern. The voltage regulator comprises at least one power switch adapted to convey power between respective input and output terminals of the voltage regulator and a digital controller adapted to control operation of the power switches responsive to an output of the voltage regulator. This may allow for better control of the CMP process, with less dishing and oxide erosion a result.