A method of forming post passivation interconnects for an integrated circuit is disclosed. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer, an intermediate semiconductor layer, and an upper semiconductor layer, and gate electrodes formed on corresponding side walls of the laminated bodies with gate insulating films interposed therebetween. The validation module may be installed between an existing PACS panel and a supported cardbiometric reader. As a result, a liquid sample applied to the polymer will preferentially migrate through the second portion, rather than through the first portion.